1. Field of the Invention
The present invention relates to semiconductor devices and manufacturing methods thereof, and more particularly, to a method of forming a non-volatile memory device having a floating gate and a related device.
2. Description of Related Art
Semiconductor memory devices can be divided into volatile memory devices and non-volatile memory devices. The non-volatile memory devices have characteristics of keeping data stored therein even though electric power is interrupted. Thus, the non-volatile memory devices have been widely adapted for mobile communication system, mobile memory devices, and auxiliary memory devices of various digital devices, and so on.
An example of the non-volatile memory devices is a flash memory device, a unit cell of the non-volatile memory device comprises an active region defined in a predetermined region of a semiconductor substrate, a tunnel dielectric layer formed on the active region, a floating gate formed on the tunnel dielectric layer, a gate inter-dielectric layer formed on the floating gate, and a control gate electrode formed on the gate inter-dielectric layer.
The floating gate acts as a charge storehouse. In this case, the floating gate is formed to have superior conductivity. For example, the floating gate can be formed of a polysilicon layer in which a high concentration of impurity ions is included. The high concentration of impurity ions acts to increase the conductivity of the floating gate.
A grain boundary is generally formed into the polysilicon layer. Further, the high concentration of impurity ions has a tendency to concentrate in the vicinity of the grain boundary, thereby degrading reliability of the tunnel dielectric layer. Meanwhile, in a case where the floating gate has a low concentration of impurity ions in order to overcome the aforementioned drawback, inferior characteristics can occur due to an increase in resistance of the floating gate.
A semiconductor device adapting a floating gate having double polysilicon layers is disclosed in U.S. Pat. No. 6,462,374, entitled “Semiconductor device and method for fabricating the same”, by Usuki et al. However, the formation of such a device requires additional processing steps, i.e., to form two polysilicon layers as opposed to one.